Demos | RISC-V Summit Europe 2023

Videos (12)

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  1 — Kumar Sankaran, Ventana Micro Systems - Data Center Workloads on RISC-V
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  2 — Karol Gugala, Antmicro - Bare Metal AI Runtime Deployment and Analysis for a RISC-V Accelerator
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  3 — Chris Morrison, Agile Analog - Digitally Wrapped Analog IP Subsystem for RISC-V Applications
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  4 — Massimiliano Giacometti, OpenHW Group - OpenHW CVA6 Linux-capable, dual-core processor on Genesys2
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  5 — Mikael Carmona, CEA - VASCO 2, an ASIC to Highlight the Latest Innovations in Security of Component
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  6 — Jon Taylor, Imperas- RISC-V Models for Verification and More.
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  7 — Roger Espasa, Semidynamics - Semidynamics Vector Unit Performance Demonstration
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  8 — Zdenek Prikryl, Codasip - RISC-V as an Enabler of Heterogeneous Compute
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  9 — Dr. Ari Kulmala, TII - Secure RISC-V for Flight controller and Mission Computer
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  10 — Warren Chen, Andes Technology Andes AI Runs Everywhere with DSP/Vector/NN Libraries and AndesClarity
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  11 — Brian Colgan, Microchip - Introducing the PolarFire® SoC Smart Embedded Vision Kit
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  12 — Jan Andersson, Frontgrade Gaisler - Designing a RISC-V SoC with the NOEL-V Processor and more.