Day 2 | Panels, Keynotes, & Technical Sessions | RISC-V Summit Europe 2023

Videos (14)

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  1 — Luca Benini, ETH Zürich - Open RISC-V Platforms for Energy-Efficient, Scalable Computing
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  2 — Dr Yungang Bao - RISC-V in China: Embracing the Era of Open-Source Chip
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  3 — Dominic Rizzo, zeroRISC Inc- OpenTitan: Past, Present and Future of Open Source Secure Silicon
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  4 — Lars Bergstrom, Google - Android on RISC-V: Progress and Updates
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  5 — Dave Ditzel - RISC-V’s revolutionary role for simultaneously supporting machine learning and HPC
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  6 — Umair Riaz: Improved Memory-Level Parallelism in a decoupled execute/access vector accelerator
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  7 — Patrick Pype, NXP - TRISTAN: Together for RISC-V Technology and Applications
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  8 — Joaquim Maria Castella Triginer - Enhancing Safety with RISC-V-based SPIDER Autonomous Robot...
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  9 — Karol Gugala & Matt Cockrell - Enabling Collaborative Chip Design and Caliptra RoT Project
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  10 — Duncan Graham, Imperas Software - Hybrid Simulation with Emulation for RISC-V Software Bring Up...
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  11 — Hualin Wu, Terapines Ltd - Accelerate HPC and AI applications with RVV auto vectorization
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  12 — Matthew Xuereb, European Commission - The European Chips Act: Enabling chip design in Europe
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  13 — Panel on EU & RISC-V
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  14 — Jeremy Bennett - The CORE‑V Software Ecosystem: Ten Lessons Learned