Day 1 | Panels, Keynotes, & Technical Session | RISC-V Summit Europe 2023

Channel: RISC-V International

Videos (19)

1 — Calista Redmond, RISC-V International - Opening
2 — Christian Fabre, CEA - Welcome from the RISC-V Summit Europe Steering Committee
3 — Daniel Müller-Gritschneder & Teresa Cervero - RISC-V Summit Europe Program Overview
4 — Mark Himelstein, RISC-V International - RISC-V: The Road Ahead and Technical Update
5 — Rick O’Connor - Commercial Adoption of CORE-V Open-Source RISC-V Cores - Lessons Learned
6 — Balaji Baktha - Paving the Road Ahead: RISC-V and Chiplet Technologies in Modern Automotive & More
7 — Jon Taylor - The RISC-V Verification Ecosystem with Open Standards and Commercial Tools
8 — Brett Cline, Codasip - RISC-V customization, HW/SW co-optimization, and custom compute
9 — Michael Gielda - RISC-V and Antmicro’s visual system designer: Everything everywhere all at once
10 — Charlie Su, Andes Technology - RISC-V is Firing on All Cylinders
11 — Roger Espasa, Semidynamics - Semidynamics Highly Configurable OOO Vector Unit
12 — Daniele Rossi, University of Pisa - HW-SW Interface for RAS in RISC-V Architectures
13 — Anthony Zgheib - Enhancing the RISC-V Trace Encoder to Verify the Control-Flow and More
14 — Stefano Mercogliano - Enabling Virtualisation on RISC-V Microcontrollers
15 — Franz Fuchs - Mitigating Transient-Execution Attacks with CHERI Compartments
16 — PANEL - What’s the Reality of RISC-V in Automotive?
17 — Jimmy Le Rhun - Safe, Secure and Reliable Computing with the NOEL-V Processor
18 — Peter Lewin, Imagination - Developing a RISC-V Automotive Safety Island
19 — Franck Bernard, Bosch - The RISC-V opportunity in Automotive Electronics